1. Field of the Invention
This invention relates to plasma processing of semiconductor devices. In particular, this invention provides a method and apparatus to calibrate a semi-empirical process simulator for predicting the surface profile and the etch or deposition rates that a given plasma process will create.
2. Background Art
Various forms of processing with ionized gases, such as plasma etching and reactive ion etching, are increasing in importance particularly in the area of semiconductor device manufacturing. Of particular interest are the devices used in the etching process. FIG. 1A illustrates a conventional inductively coupled plasma etching system 100 that may be used in the processing and fabrication of semiconductor devices. Inductively coupled plasma processing system 100 includes a plasma reactor 102 having a plasma chamber 104 therein. A transformer coupled power (TCP) controller 106 and a bias power controller 108 respectively control a TCP power supply 110 and a bias power supply 112 influencing the plasma created within plasma chamber 104.
TCP power controller 106 sets a set point for TCP power supply 110 configured to supply a radio frequency (RF) signal, tuned by a TCP match network 114, in a TCP coil 116 located near plasma chamber 104. A RF transparent window 118 is typically provided to separate TCP coil 116 from plasma chamber 104 while allowing energy to pass from TCP coil 116 to plasma chamber 104.
Bias power controller 108 sets a set point for bias power supply 112 configured to supply a RF signal, tuned by a bias match network 120, to an electrode 122 located within the plasma reactor 104 creating a direct current (DC) bias above electrode 122 which is adapted to receive a substrate 124, such as a semi-conductor wafer, being processed.
A gas supply mechanism 126, such as a pendulum control valve, typically supplies the proper chemistry required for the manufacturing process to the interior of plasma reactor 104. A gas exhaust mechanism 128 removes particles from within plasma chamber 104 and maintains a particular pressure within plasma chamber 104. A pressure controller 130 controls both gas supply mechanism 126 and gas exhaust mechanism 128.
A temperature controller 134 controls the temperature of plasma chamber 104 to a selected temperature setpoint using heaters 136, such as heating cartridges, around plasma chamber 104.
In plasma chamber 104, substrate etching is achieved by exposing substrate 104  124 to ionized gas compounds (plasma) under vacuum. The etching process starts when the gases are conveyed into plasma chamber 104. The RF power delivered by TCP coil 116 and tuned by TCP match network 110 ionizes the gases. The RF power, delivered by electrode 122 and tuned by bias match network 120, induces a DC bias on substrate 124 to control the direction and energy of ion bombardment of substrate 124. During the etching process, the plasma reacts chemically with the surface of substrate 124 to remove material not covered by a photoresistive mask.
Input parameters such as plasma reactor settings are of fundamental importance in plasma processing. The amount of actual TCP power, bias power, gas pressure, gas temperature, and gas flow within plasma chamber 104 greatly affects the process conditions. Significant variance in actual power delivered to plasma chamber 104 may unexpectedly change the anticipated value of other process variable parameters such as neutral and ionized particle density, temperature, and etch rate.
Traditionally, a suite of values of these input parameters suitable for creating a given set of device features has been determined by trial and error. Development of a single process by this empirical approach is costly and time-consuming, requiring treatment of several patterned wafers and subsequent study of the resulting profiles by scanning electron microscopy. Because of the unpredictable way a small change in one input parameter may affect the profile, any modification of the layout—for example, in device dimension, pattern density on the wafer or change in total open area—from one application to another, has often necessitated redevelopment of the process, with the attendant outlay of resources.
Recent advances in device fabrication technology are rendering this approach even more onerous. Decreasing feature sizes demand tighter tolerances on feature dimensions and morphologies, so that the number of trials required to optimize a given process is increasing. The acceleration of wafer diameter growth and the complete redesign of the process involved with an incremental change in diameter have increased the number of times this empirical process must be repeated. The increasing use of devices tailor-made to a specific application also increases the amount of development and optimization activity required.
An alternative, computational approach would derive input parameters from a complete physical description of a plasma process including a plasma model for describing the coupling between the macroscopic input parameters and the macroscopic fluxes, concentrations and energy distributions of the various species in the plasma; and a profile simulator for determining atomistically from the macroscopic fluxes the resulting etch or deposition rate along the wafer surface and calculating the profile evolution therefrom. Ideally, such a physical description of plasma etching and deposition processes would enable the ab initio selection of the macroscopic input parameters appropriate for generating a desired profile on the substrate, eliminating the need for expensive and time-consuming test sequences.
Research in this field has done much to elucidate mechanisms at work in plasma processes, and thus has contributed scaling laws that could frame a physical description. However, notwithstanding the availability of computational means sufficiently powerful to perform the necessary calculations based on known scaling laws, the implementation of such an ab initio approach has been limited by lack of data. For example, the manner in which the values of some coefficients in these laws depend on the particulars of a given process is unknown as yet. In some investigations, determination of the value of such a scaling coefficient consistent with a plasma process defined by a given set of input parameters has been done by comparing a finished profile, created by applying that process, with a simulated profile including one or more of these coefficients as adjustable parameters. Such hindsight evaluation may promote understanding a given coefficient's role in scaling law, but it has not afforded the ability to predict profile evolution for any process defined by a set of input parameters differing from the set used in the experimental process used to derive the value of that coefficient.
Thus, there is a need for a method for calibrating a semi-empirical process simulator for predicting the surface profiles and the etch or deposition rates that a given plasma process will create.